Individual semiconductor (integrated circuit) devices are typically produced by creating a plurality of devices on a silicon wafer using well known semiconductor processing techniques that can include photolithography, deposition, and sputtering. Generally, these processes are intended to create fully-functional integrated circuit devices (ICs) at the wafer level. Eventually, the individual IC devices are singulated, or diced, into the separate and individual dies from the semiconductor wafer. Singulated IC devices are assembled for final completion in packages or incorporation into electronic apparatus using well known assembly techniques that can include die attach to a lead-frame, wire bonding or solder ball attach, and encapsulation usually by various molding techniques to provide a body to the package with external electrical connectivity.
In practice, however, physical defects in the wafer itself and/or defects in the processing of the wafer can inevitably lead to some of the dies on the wafer being either fully-functional, some of the dies being non-functional, and some of the dies have lower performance or the need for repair. It is generally desirable to identify which of the dies on a wafer are fully functional preferably prior to singulation from the wafer and assembly into consumer devices. Non-functional, lower performing, and repairable devices due to certain physical defects in the wafer, defects in the IC circuit layers, and/or defects related to the semiconductor processing techniques are identified prior to singulation by a process called wafer-level test (often referred to in the arts as “wafer sort”). Sorting, or binning, IC devices at the wafer level according to the product's capabilities where the product performance is determined by electrical testing can save the manufacturer considerable cost later in the manufacturing process as well as provide increased revenue from the sales of the highest performing devices.
Once the device has been singulated, certain process steps during handling and assembly can inevitably lead to dicing defects, handling defects, assembly and packaging related defects that can only be identified electrically to bin devices as fully-functional, non-functional, or potentially “repairable”. In practice, assembled and packaged semiconductor devices are subject to a series of electrical testing processes prior to their final completion or incorporation into electronic apparatus. The process at package level or final test prior to shipment includes, but is not limited to, testing of singulated devices either bare die, packaged IC (temporary or permanent), or variants in between.
Commonly, electrical testing of the IC devices at either the wafer level or package level is accomplished by means of automatic test equipment (ATE) configured mechanically and electrically for stimulating the semiconductor devices, exercising the device according to a pre-determined test routine, and then examining the output for assessing proper functionality
At wafer level test, conventional interface hardware is a “probe card” to which pluralities of probe elements that match the layout of the device under test (DUT) input/output (I/O) pads, are connected. More specifically, in the typical wafer testing process, the probe card is mounted to the prober, and probe contact elements (simply referred to as “probes”) are brought into contact with bonding pads, solder balls and/or gold bumps formed on the dies of the wafer. By exerting controlled displacement of the probe tips against the bonding pads, solder balls and/or gold bumps, an electrical connection is achieved allowing the power, ground and test signals to be transmitted. Repeated scrub, deformation, and penetration of the probe tips against the bonding pads, solder balls and/or gold bumps, produces debris and contaminants that adhere and accumulate onto the probe contact surface.
At package level test, a tester load board provides interface between automated test equipment (ATE), or manual test equipment, and the DUT. The tester load board conventionally includes one or more contactor assemblies, sometimes referred to as “test socket(s)” into which DUT(s) is (are) inserted. During the testing process, a DUT is inserted or placed into the socket by the handler and held into position for the duration of testing. After insertion into the socket, the DUT, via the pin elements, is electrically connected to the ATE through the tester load board, its sub assemblies, and other interfacing apparatus. Contact pin elements associated with the ATE are placed in physical and electrical contact with the metallized contact surfaces of the DUT. These surfaces may include test pads, lead wire, pin connectors, bond pads, solder balls, and/or other conductive media. The functionality of DUTs is evaluated through various electrical inputs and measured responses on outputs. With repeated testing, the contact element tip can become contaminated with materials such as aluminum, copper, lead, tin, gold, bi-products, organic films or oxides resulting from the wafer and semiconductor device manufacturing and testing processes.
One of the major challenges encountered with both types of IC testing (wafer level and package level) is ensuring optimal electrical contact between the contact pins associated with the contactor element, and the contact surfaces of the DUT. In each test procedure, with repeated contact the pin contact elements onto bonding pads, solder balls and/or gold bumps, debris and other residuals will accumulate and contaminate the contact area of the pin elements. This debris may originate from the testing and handling process itself, or may include manufacturing residue from the device fabrication and/or assembly process(es) or from other sources.
In addition to the presence of contaminants, repeatedly forcing electrical current through the small intermetallic “a-spots” of the contact pins can degrade the conductivity characteristics of contact surfaces, thus affecting the intermetallic quality for proper electrical testing. As the contaminants accumulate, coupled with degradation of contact surfaces, the contact resistance (CRES) rises and reduces the reliability of the tests. Increasing and unstable CRES can impact yield and/or test time as yield recovery testing increases. Such erroneous readings can lead to the false rejection of otherwise good DUTs resulting in, often dramatic, yield loss. Some yield recovery may be possible through multi-pass testing; however, retesting devices multiple times to verify a bad device or to attain yield recovery causes the overall production costs to increase.
High performance demands for wafer level and package level test contactor technologies have furthered the development of uniquely shaped contact elements with predetermined and customized mechanical performance and elastic properties. Many of the new advanced contact technologies have unique contact element geometries and mechanical behavior to facilitate consistent, repeatable, and stable electrical contact. Some of the technologies are constructed using lithographic assembly techniques; while others are fabricated with high accuracy micro-machining techniques. Improved electrical characteristics of the contactors are also attained using various materials with improved electrical performance and resistance to oxidation. The contact elements are engineered to facilitate consistent oxide penetration while reducing the applied bearing force onto the bonding pads, solder balls and/or gold bumps. It is still necessary to make physical contact with the bonding pads, solder balls and/or gold bumps; thereby, generating debris and contamination that could affect the results from the electrical performance testing procedures.
Typically, the generated debris needs to be periodically removed from the contact elements to prevent a build-up that causes increased contact resistance, continuity failures and false test indications, which in turn result in artificially lower yields and subsequent increased product costs.
In response to the problem of particles adhering to the contact element and supporting hardware, a number of techniques have been developed. For example, one technique uses cleaning materials composed of a silicone rubber which provides a matrix for abrasive particles. In addition, a cleaning wafer with a mounted abrasive ceramic cleaning block which is rubbed against the probe needles may be used or a rubber matrix with abrasive particles and a brush cleaner made of glass fibers also may be used. In one technique, the probe needles may be sprayed or dipped in a cleaning solution. In another technique, open cell foam based cleaning device with a random surface morphology of voids and variable heights may be used.
In one conventional contact element cleaning process, some combination of brushing, blowing, and rinsing the contact pins and/or contactor bodies is employed. This process requires stopping the testing operation, manual intervention to perform the cleaning, and possibly removing the test interface (probe card, socket, etc.) from the test environment. This method provides inconsistent debris removal and may not provide sufficient cleaning action within the geometric features of shaped contact elements. After cleaning, the test interface must be reinstalled and the test environment reestablished so that testing may resume. In some cases, the contact elements are removed, cleaned, and replaced resulting in elevated costs due to unscheduled equipment downtime.
In another conventional method, a cleaning pad with an abrasive surface coating or abrasively coated polyurethane foam layer is used to remove foreign materials adhering to the contact elements. Adherent foreign materials are abraded off the contact elements and supporting hardware by repeatedly scrubbing the contact elements against (and possibly into) the cleaning pad. The process of cleaning using an abrasive pad burnishes the contact element but it does not necessarily remove debris. In fact, the burnishing actually causes abrasive wear to the contact elements thereby changing the shape of the contact geometry and shortening the useful life of the contactor.
Maximum cleaning efficiency is attained when the removal of the debris from the contact element and supporting hardware is performed consistently and predictably during the cleaning process. The process of cleaning using an abrasive pad constructed from open celled foam does not provide consistent cleaning. In fact, the burnishing action by the randomly oriented and uncontrolled foam structures causes non-uniform abrasive wear as well as preferential abrasive wear to the contact elements thereby unpredictably changing the shape of the contact geometry and mechanical performance of the contact element and support hardware; thereby, unpredictably shortening the useful life of the contactor.
In the industry, it has been seen that the tester interface hardware consisting of a plurality of contact elements, as many as 150,000 test probe elements, and the support hardware can cost as much as $600K per ATE test cell. Premature wear-out and damage due to improper or non-optimal cleaning practices can equate to millions of US dollars per annum per ATE test cell. Therefore, with thousands of ATE test cells operating worldwide, the impact to the repair, maintenance, and replacement costs can be very substantial.
Another attempt to improve upon the conventional probe cleaning process includes using a tacky abrasively filled or unfilled polymeric cleaning material to remove the foreign materials. More specifically, the polymer pad is brought into physical contact with the contact elements. Adherent debris is loosened by the tacky polymer and sticks to the polymer surface; thereby removed from the contact elements and other test hardware. The polymer materials are designed to maintain the overall shape of the contact elements; however, interaction with the polymer layer may not provide sufficient cleaning action within the geometric features of shaped contact elements.
When cleaning with abrasively filled or abrasively coated materials films that have a continuous, uniform surface or a surface with randomly oriented and randomly spaced surface features, preferential abrasion is manifested through “edge pin” effects (for example, peripheral contact elements of a test probe array are abrasively worn at different rates than the contact element within the array); or through “neighbor pin spacing” effects (for example, closely spaced contact elements are worn at different rates than widely spaced contact elements); or through “neighbor pin orientation” effects (for example, spatial proximity of contact elements can cause preferential and asymmetric wear of contact elements). Non-uniform abrasive wear of contact elements and support hardware will affect the performance consistency during the IC semiconductor device testing and could result in unexpected yield loss, equipment downtime, and repair costs.
Typical contact element cleaning processes at wafer level and package level testing can be expensive for the end-user since the contactors may be uncontrollably worn away at different rates by the abrasive-based contact cleaning processes. When using abrasive particles of identical composition and size, exemplary test data (FIG. 1) shows that the rate of wear-out or dimensional reduction for critical contact element geometries can be dramatically affected by relatively small changes (approximately 2 to 3%) to the compliance of the abrasive material layers, surface features, and that of the under-layers. Data curves 101, 102, 103, and 104 demonstrate the rate at which the reduction in contact element length occurs as the overall compliance of the cleaning materials is modified and reduced. Data curve 101 represents a compliant material which has the lowest wear out rate; and Data curve 104 represents a rigid compliant material which has the highest wear out rate. With thousands of IC device testing units (probers and handlers) operating worldwide, the impact to the industry from maintaining clean contact elements without premature wear out during testing can be very substantial.
None of these methods adequately address a cleaning device and method that incorporates a cleaning pad construction with multiple layers of different material and mechanical properties, predetermined geometrical features, and surface treatments to predictably control the overall cleaning material performance. In addition, the equipment and manual labor to repair and replace contactors that have been worn away by an abrasive contact cleaning process adds additional costs to the task performed. Accordingly, there is a need for improved methods and apparatuses for cleaning and maintaining the contact elements.